A Work of art. I remember my dad building a computer using discrete TTL chips in our garage in Auckland. He took like two years and I'm guessing about five people saw it. I would love to see more of these on HN, but most don't get past a few upvotes in the sea of AI stuff.
Once you introduce a HDL and start optimizing, I would expect more than half of the transistors to be redundant. But you would end up with a circuit that you will not understand any more.. But that could give an important lesson in chip design and HDL compilers.
Would standard HDL synthesis engines be better at this in terms of schematic capture? They could do optimizations that I think if I'm reading right weren't done here
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https://en.wikipedia.org/wiki/Matchbox_Educable_Noughts_and_...
Once you introduce a HDL and start optimizing, I would expect more than half of the transistors to be redundant. But you would end up with a circuit that you will not understand any more.. But that could give an important lesson in chip design and HDL compilers.